Hantek 2D72 - CH1 and CH2 not sampled simultaneously

gf1

Dear Support,

when both channels are enabled, I notice a time offset/difference between CH1 and CH2, in the amount of about 50ns at >= 10us/div and about 5ns at faster time base settings. This is obviously 1/2 of the ADC clock period, which is used at the particular time base setting.

This is nasty, and it makes particulary X-Y mode quite unreliable (-> what I measure does not reflect the truth)

Example:
The same 1MHz sine wave signal is fed into both, CH1 and CH2, and displayed in X-Y mode. One would expect to see a diagonal line, however, an ellipse is displayed, although there is no phase shift between the signals fed into CH1 and CH2 - it is the same signal (-> same kind of PP-80 probes used for both channels, I also tried alternatively with two 50 Ohm terminated coax cables of the same length - no differece).



The same in the time domain (captured at 10us/div, then frozen and zoom-in):



Do you see any possibility to fix this problem in the FPGA and/or firmware?

Versions of my device:

SOFT 2018120601
PCB   0000000001
FPGA V02

Thanks,
gf1

amy

Thanks for your feedback, we will modify.

gf1

Hi Amy,

the AWG is connected to both scope channels with BNC-cables of equal length (25cm). 50 Ohm terminated at the scope inputs.



It is easy to reproduce. Set AWG to say 1.95 MHz sine wave. Set scope timebase to 10us/div and enter X-Y mode. An ellipse appears instead of the expected diagonal line => about 50ns time offset between CH1 and CH2.

[ For time base <= 5us/div, the time offset is smaller - only about 5ns. But I just need to  increase the signal frequency to say 10..20 MHz, and 5ns offset is still sufficient to turn the expected diagonal straight line into an ellipse. ]






I think that the root cause is related to the following observation:
I did measure the clock signals of the two channels of the AD9288, and obviously the clocks have always a phase difference of 180° (independent of the number of enabled channels). When the two ADCs are interleaved, for doubling the sampling rate in single-channel mode, this is indeed desired. But if both channels are enabled, then the ADCs must not be interlaved, but both channels must be sampled by the track &hold of the two ADCs at the same time.

amy

Sir, I've tested and didn't find this problem.
How do you connect the signal to the oscilloscope? Please take a picture to me to study.
And check whether there is the phase difference between the two channels on the oscilloscope display.